RK3308 يک پردازنده ي 4 هسته اي براي اهداف پردازش صوتي بصورت ورودي خروجي و ديگر پردازش هاي مولتي مديا. اين پردازنده از پروتکول هاي I2S, PCM, TDM, PDM, SPDIF, HDMI ARC پشتيباني ميکند. -ويژگي ها : -پردازنده ي چهار هسته اي ARM -داراي حافظه ي 256 کيلوبايت براي L2 Cache -externally turn on/off based on different application scenario - PD_A35_0: 1st Cortex-A35 + Neon + FPU + L1 I/D Cache - PD_A35_1: 2nd Cortex-A35 + Neon + FPU + L1 I/D Cache - PD_A35_2: 3rd Cortex-A35 + Neon + FPU + L1 I/D Cache - PD_A35_3: 4th Cortex-A35 + Neon + FPU + L1 I/D Cache

RK3308 is a high-performance Quad-core application processor designed for intelligent voice interaction, audio input/output processing, and other digital multimedia applications. Embedded rich audio interfaces, such as I2S, PCM, TDM, PDM, SPDIF, HDMI ARC and so on, can meet different audio application development, reduce hardware development complexity and development cost. Embedded Voice Activity Detection function will monitor human voice at any time, respond to human voice request timely and fast setup intelligent voice interaction application, which will also reduce hardware system power consumption and improve battery endurance. RK3308 has high-performance external memory interface (DDR2/DDR3/DDR3L/LPDDR2) capable of sustaining demanding memory bandwidths. 1.2 Features The features listed below which may or may not be present in actual product, may be subject to the third party licensing requirements. Please contact Rockchip for actual product feature configurations and licensing requirements. 1.2.1 Microprocessor: -Quad-core ARM Cortex-A35 CPU - ARM architecture v8-A instruction set - ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation -ARMv8 Cryptography Extensions -256KB unified system L2 cache -include VFP v4 hardware to support single and double-precision operations -Integrated 32KB L1 instruction cache, 32KB L1 data cache with 4-way set associative - TrustZone technology support - Separate power domains for CPU core system to support internal power switch and externally turn on/off based on different application scenario - PD_A35_0: 1st Cortex-A35 + Neon + FPU + L1 I/D Cache -PD_A35_1: 2nd Cortex-A35 + Neon + FPU + L1 I/D Cache -PD_A35_2: 3rd Cortex-A35 + Neon + FPU + L1 I/D Cache -PD_A35_3: 4th Cortex-A35 + Neon + FPU + L1 I/D Cache -One isolated voltage domain to support DVFS